Automated Thermal Stabilization of Cascaded Silicon Photonic Ring Resonators for Reconfigurable WDM Applications

We describe a universal FPGA-based feedback algorithm for thermal stabilization of cascaded silicon photonic micro-ring resonators based subsystem-on-chip. Scalability is demonstrated through the successful simultaneous optimization of 10Gb/s/λ WDM uni/multicast data. Introduction Silicon photonic (SiP) technology has recently been adapted by industry on scales ranging from basic devices to highly integrated commercial optical sub-systems that utilize standard CMOS fabrication processes1. SiP technology is especially beneficial as it offers high bandwidth density and flexibility in the optical domain, for data intensive applications such as inter/intra datacenters communication2 and CPU-memory interconnects3. While fabrication foundries offer a variety of SiP components including waveguides, MachZehnder interferometers and fiber coupling structures, the micro-ring resonator (MRR) is one of the most versatile building blocks in SiP technology4. The MRR’s small footprint, low power consumption, and filtering capability have led to the development of MMR based tunable filters, modulators and flexible WDM (de)multiplexers. The high thermo-optic effect associated with silicon, however, means that changes in ambient temperature, or thermal crosstalk within a SiP chip, lead to a variation in MRR resonance wavelength. This thermal sensitivity reduces MRR reliability and has hindered their integration into large scale commercial products. Passive cladding of polymers counter-act the thermo-optic effect of silicon and can provide consistent performance over a wide temperature range. However, this solution requires postfabrication processes that are not CMOS compatible and can be problematic for large scale manufacturing5. Active feedback loops, based on tapping a portion of the optical signal, can stabilize operation in the presence of thermal fluctuations5. To date, this approach has been applied only to a single MRR device. In order to reliably perform operations such as reconfigurable optical multicasting and WDM provisioning, multiple MRRs must be controlled and orchestrated simultaneously, and still exhibit stability under thermal variations. We present a universal approach that resolves the problems with previously proposed passive and active compensation mechanisms to overcome MRR thermal sensitivity. In this work, a scalable field-programmablegate-array (FPGA) based feedback algorithm is developed which allows reliable, reconfigurable WDM networking on an SiP MRR subsystem-onchip in the presence of thermal fluctuations. The SiP chip is a flexible (de)mux consisting of 7 cascaded MRRs that are wavelength reconfigurable though thermal tuning6, and exhibit a thermal sensitivity of 0.067nm/C. The implemented algorithm is a universal solution that can be scaled to work with cascaded MRR based SiP chip designs with different spectral responses and number of devices. The performance of the tuning algorithm is evaluated in a 10Gb/s/λ NRZ WDM networking scenario involving simultaneous unicast and multicast operations. Results show that the post tuning improvement leads to error free operation of seven cascaded MRRs simultaneously.